
MAX1434
Octal, 10-Bit, 50Msps, 1.8V ADC
with Serial LVDS Outputs
______________________________________________________________________________________
21
N.C.
OVDD
OUT1N
OVDD
OUT2N
OVDD
N.C.
OUT2P
OUT1P
OUT3P
OVDD
FRAMEP
CLKOUTP
CLKOUTN
OUT3N
OVDD
OUT4P
OUT5P
OUT5N
OUT4N
OVDD
FRAMEN
IN1N
GND
IN2P
GND
IN3P
IN3N
GND
IN1P
GND
+
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
100
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
GND
N.C.
DT
CVDD
N.C.
IN7N
IN7P
GND
IN0N
IN0P
GND
CMOUT
REFADJ
REFIO
GND
REFP
REFN
GND
AV
D
AV
D
AV
D
PLL1
PLL2
PLL3
PD
LVDSTEST
OUT0P
OUT0N
OVDD
N.C.
GND
MAX1434
TOP VIEW
IN2N
AVDD
GND
IN4P
GND
N.C.
IN4N
GND
IN5P
GND
IN6P
IN6N
IN5N
AVDD
GND
CLK
AVDD
OUT7P
OVDD
OUT6N
0VDD
OUT7N
OVDD
OUT6P
TQFP
14mm x 14mm x 1mm
SL
VS/L
VDS
T/B
*EP
*CONNECT EP TO GND
Pin Configuration
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE NO.
LAND
PATTERN NO.
100 TQFP-EP
C100E+2